Do you have an example for modelling a SVS/SVC (Static var system/compensator)?
The attached files illustrate two model implementations (SVCExampleWithoutSVSInterface.pfd and SVCExampleWithInterface.pfd): individual control or synchronized control of parallel SVS devices:
1. Controlling the SVS element without an interface (see SVCExampleWithoutSVSInterface.pfd). In this case the
limits of the control are properly considered for any initial condition. The parallel capacitors have to be modelled separately and also explicitly controlled.
2. Using the "SVS Interface" (see SVCExampleWithInterface.pfd). The interface always initializes the controller output to zero. This should be used with care since the consideration of the SVS control limits in this case will be offset by the initial SVC admittance. The interface has the advantage that operates the parallel capacitors in a synchronized way, if required.
The option "Rating of SVS-controller output" must be set first. This option allows you to select the base value of the controller output (usvs). That is, the SVS-Interface is between the SVS and the controller and depending on the selecting option is how the controller output is interpreted.
1. Reactor: the output of the controller (usvs) is interpreted as an admittance in per unit of a base equal to the admittance of the Reactive Power in the SVS under "TCR/Q Reactance".
2. Nominal voltage: the output of the controller (usvs) is interpreted as an admittance in per unit of a base equal to the nominal voltage of the SVS.
3. the output of the controller (usvs) is interpreted as an admittance in per unit of a base equal to the admittance of the entered Reactive Power Rating.